1. Field of the Invention
The present invention relates to an electron beam exposure apparatus and an electron beam exposure method. Particularly, it relates to a multi-column electron beam exposure apparatus and a multi-column electron beam exposure method which are suitable for exposing process with multiple column cells.
2. Description of the Prior Art
In prior art electron beam exposure apparatuses, a variable rectangular opening or multiple stencil mask patterns are provided to a stencil mask, and a certain pattern of the opening or a certain stencil mask pattern is selected by beam deflection and is exposed and transferred onto a wafer. Although multiple mask patterns are prepared in an electron beam exposure apparatus of this type, the number of electron beams used for exposure is one, and only one mask pattern is transferred at one time.
As such an exposure apparatus, for example, Japanese Patent Application Publication No. 2004-88071 discloses an electron beam exposure apparatus which performs partial batch exposure. In the partial batch exposure, one pattern area (for example, a 300×300 μm area) selected by beam deflection from multiple (for example, 100 pieces of) stencil patterns disposed on a mask is irradiated with a beam. The cross section of the beam is shaped into the shape of the stencil pattern. The beam which has passed through the mask is deflected back by a deflector at a later stage. The beam is reduced to a certain reduction percentage (for example, 1/60) decided according to a property of an electron optical system, and the pattern is transferred onto a wafer surface by using the beam. The area of the wafer surface irradiated at one time is 5×5 μm, for example. When the stencil patterns on the mask are appropriately prepared according to device patterns to be exposed, the necessary number of exposure shots is reduced significantly and throughput is improved accordingly, compared with a case where only the variable rectangular opening is used.
Furthermore, a multi-column electron beam exposure apparatus has been proposed, in which multiple of such columns each made smaller in size (hereinafter, referred to as column cells) are collected and arranged in parallel on a wafer for exposing process (see T. Haraguchi, et al., J. Vac. Sci. Technol, B22 (2004) 985). Each of the column cells is equivalent to a column in a single-column electron beam exposure apparatus. However, since the exposing process is performed by the multi-columns as a whole arranged in parallel, exposure throughput can be increased by severalfold of the columns.
As described above, improvement in throughput can be attained in the multi-column electron beam exposure apparatus.
However, connection accuracy across exposure patterns is reduced at a boundary of irradiation areas of column cells. FIGS. 1A and 1B show an example in which a desired pattern is not obtained at a position across adjacent column cells. FIG. 1A shows a desired pattern 3 at a boundary between an irradiation area 1 of a first column cell and an irradiation area 2 of a second column cell. FIG. 1B shows an example of a pattern obtained as a result of exposure. The irradiation area 1 is exposed as a pattern 5, and the irradiation area 2 is exposed as a pattern 4. Accordingly, the obtained pattern differs from the desired exposure pattern 3. In this manner, there arises a case where the width of the exposure pattern varies from area to area and a desired exposure pattern may not be obtained. Moreover, a position to be exposed may shift, and the pattern may be separated at worst.
There is no particular problem when a design is made not to expose a pattern continuing across column cells as mentioned above. However, when the design is made taking positions of multiple column cells into consideration, the design flexibility is markedly reduced. Accordingly, exposure of a pattern continuing across column cells is inevitable.
Moreover, there is no particular problem, for example, when patterns to be drawn are wide and may be shifted at a connection position across column cells as long as the patterns are connected. However, when the patterns are narrow as in a case of a transistor gate, higher connection accuracy is demanded.